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general description the max1645 are high-efficiency battery chargers capa- ble of charging batteries of any chemistry type. it uses the intel system management bus (smbus ? ) to control volt- age and current charge outputs. when charging lithium-ion (li+) batteries, the max1645 automatically transition from regulating current to regu- lating voltage. the max1645 can also limit line input current so as not to exceed a predetermined current drawn from the dc source. a 175s charge safety timer prevents ?unaway charging?should the max1645 stop receiving charging voltage/ current commands. the max1645 employs a next-generation synchronous buck control circuity that lowers the minimum input-to- output voltage drop by allowing the duty cycle to exceed 99%. the max1645 can easily charge one to four series li+ cells. applications notebook computers point-of-sale terminals personal digital assistants features input current limiting 175s charge safety timeout 128ma wake-up charge charges any chemistry battery: li+, nicd, nimh, lead acid, etc. intel smbus 2-wire serial interface compliant with level 2 smart battery charger spec rev. 1.0 +8v to +28v input voltage range up to 18.4v battery voltage 11-bit battery voltage setting ?.8% output voltage accuracy with internal reference 3a max battery charge current 6-bit charge current setting 99.99% max duty cycle for low-dropout operation load/source switchover drivers >97% efficiency max1645/max1645a advanced chemistry-independent, level 2 battery chargers with input current limiting ________________________________________________________________ maxim integrated products 1 28 27 26 25 24 23 22 21 20 19 18 17 16 15 1 2 3 4 5 6 7 8 9 10 11 12 13 14 cvs pds cssp cssn bst dhi int lx dlov dlo pgnd csip csin pdl sda scl thm v dd dac batt gnd ccv cci ccs ref cls ldo dcin qsop top view max1645 max1645a 19-1566; rev 2; 1/01 part max1645 eei -40? to +85? temp. range pin-package 28 qsop typical operating circuit appears at end of data sheet. smbus is a trademark of intel corp. pin configuration ordering information max1645a eei -40? to +85? 28 qsop for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com.
max1645/max1645a advanced chemistry-independent, level 2 battery chargers with input current limiting 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics (circuit of figure 1, v dd = +3.3v, v batt = +16.8v, v dcin = +18v, t a = 0? to +85? , unless otherwise noted. typical values are at t a = +25?.) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. dcin, cvs, cssp, cssn, lx to gnd....................-0.3v to +30v cssp to cssn, csip to csin ...............................-0.3v to +0.3v pds, pdl to gnd ...................................-0.3v to (v cssp + 0.3v) bst to lx..................................................................-0.3v to +6v dhi to lx ...................................................-0.3v to (v bst + 0.3v) csip, csin, batt to gnd .....................................-0.3v to +22v ldo to gnd .....................-0.3v to (lower of 6v or v dcin + 0.3v) dlo to gnd ...........................................-0.3v to (v dlov + 0.3v) ref, dac, ccv, cci, ccs, cls to gnd ..... -0.3v to (v ldo + 0.3v) v dd , scl, sda, int, dlov to gnd.........................-0.3v to +6v thm to gnd ...............................................-0.3v to (v dd + 0.3v) pgnd to gnd .......................................................-0.3v to +0.3v ldo continuous current.....................................................50ma continuous power dissipation (t a = +70?) 28-pin qsop (derate 10.8mw/? above +70?).........860mw operating temperature range ...........................-40? to +85? storage temperature.........................................-60? to +150? lead temperature (soldering, 10s) .................................+300? 8v < v dcin < 28v v cvs referred to v batt , v cvs rising v pds = v cssp - 2v, v dcin = 16v pds = cssp i pds = 0 0 < v dcin < 6v, v dd = 5v, v scl = 5v, v sda = 5v v cvs referred to v batt v cvs referred to v batt , v cvs falling when the smb res- ponds to commands 8v < v dcin < 28v 8v < v dcin < 28v when ac_present switches when i charge drops to 128ma 8v < v dcin < 28v, 0 < i ldo < 15ma 0 < i ref < 200? conditions mv -150 -100 -50 v pdl-off pdl load switch turn-off threshold ma 10 50 pds turn-off current ? 100 150 300 pds turn-on current v 81012 pds output low voltage, pds below cssp mv 100 200 300 v pds-hys pds charging source switch threshold hysteresis mv 50 100 150 v pds-off pds charging source switch turn-off threshold v 2.4 2.8 batt undervoltage threshold (note 2) v 4.066 4.096 4.126 v ref ref output voltage ma 1.7 6 i dcin dcin supply current v 828 v dcin ? 80 150 i dd v dd quiescent current 2.1 2.5 v 2.55 2.8 v dd undervoltage threshold v 2.8 5.65 v dd input voltage range (note 1) ma 0.7 2 dcin supply current charging inhibited v 7.5 7.85 dcin undervoltage threshold 7 7.4 v 5.15 5.4 5.65 v ldo ldo output voltage units min typ max symbol parameter dcin rising dcin falling v dd rising v dd falling dcin typical operating range general specifications
max1645/max1645a advanced chemistry-independent, level 2 battery chargers with input current limiting _______________________________________________________________________________________ 3 electrical characteristics (continued) (circuit of figure 1, v dd = +3.3v, v batt = +16.8v, v dcin = +18v, t a = 0? to +85? , unless otherwise noted. typical values are at t a = +25?.) ccv/cci/ccs clamp voltage (note 4) v ccv = v cci = v ccs = 0.25v to 2v 150 300 600 mv 61.6 128 194.4 v batt = 1v, r csi = 50m ? v batt = 1v, r csi = 50m ? max1645a cssn input bias current -100 35 100 ma v cssp = c cssn = v dcin = 0 to 28v v cls = 2.048v v cls = 4.096v chargingcurrent() = 0x0080 chargingcurrent() = 0x0bc0 dcin source current limit (note 3) cls input bias current -1 0.05 1 ? battery voltage-error amp transconductance 0.111 0.222 0.444 ?/mv battery current-error amp transconductance 0.5 1 2 ?/mv input current-error amp transconductance 0.5 1 2 parameter symbol min typ max units 8.333 8.4 8.467 12.492 12.592 12.692 v batt full-charge voltage v0 16.666 16.8 16.934 cvs input bias current 620 ? 4.150 4.192 4.234 batt charge current (note 3) i0 2.798 3.008 3.218 a 61.6 128 194.4 ma 4.714 5.12 5.526 a pdl turn-off current pdl load switch threshold hysteresis v pdl-hys 100 200 300 mv 612 ma pdl turn-on resistance 50 100 150 k ? 2.282 2.56 2.838 batt undervoltage charge current 20 128 200 ma batt/csip/csin input voltage range 020 v total batt input bias current -700 700 ? total batt quiescent current -100 100 ? total batt standby current -5 5 ? cssp input bias current -100 540 1000 ? cssp/cssn quiescent current -1 1 ? battery voltage-error amp dc gain 200 500 v/v ?/mv v cls = v ref /2 to v ref from batt to ccv, chargingvoltage() = 0x41a0, v batt = 16.8v from csip/scin to cci, chargingcurrent() = 0x0bc0, v csip - v csin = 150.4mv conditions chargingvoltage() = 0x20d0 max1645 chargingvoltage() = 0x3130 chargingvoltage() = 0x41a0 v cvs = 28v chargingvoltage() = 0x1060 r cs = 50m ? total of i batt , i csip, and i csin ; v batt = 0 to 20v r css = 40m ? total of i batt , i csip, and i csin ; v batt = 0 to 20v, charge inhibited total of i batt , i csip, and i csin ; v batt = 0 to 20v, v dcin = 0 v cssp = v cssn = v dcin = 0 to 28v v cvs referred to v batt v cssp = v cssn = 28v, v dcin = 0 v cssn - v pdl = 1v from batt to ccv from cssp/cssn to ccs, v cls = 2.048v, v cssp - v cssn = 102.4mv pdl to gnd
max1645/max1645a advanced chemistry-independent, level 2 battery chargers with input current limiting 4 _______________________________________________________________________________________ v sda = 0.4v all 4 comparators, v dd = 2.8v to 5.65v v dd = 2.8v to 5.65v, v thm falling v dd = 2.8v to 5.65v, v thm falling dlo high or low, v dlov = 4.5v dhi high or low, v bst - v lx = 4.5v v dd = 2.8v to 5.65v, v thm falling v dd = 2.8v to 5.65v, v thm falling r csi = 50m ? v dlov = v ldo , dlo low v dcin = 28v, v batt = v lx = 20v v dcin = 0, v batt = v lx = 20v v thm = 4% of v dd to 96% of v dd , v dd = 2.8v to 5.65v dhi high conditions ma 6 sda output low sink current ? -1 1 sda/scl input bias current mv 220 sda/scl input hysteresis v 1.4 sda/scl input high voltage v 0.6 sda/scl input low voltage 1 thermistor comparator threshold hysteresis 6 7.5 9 thermistor underrange threshold % of v dd 22 23.5 25 thermistor hot threshold 74 75.5 77 thermistor cold threshold 89.5 91 92.5 thermistor overrange threshold ? -1 1 thm input bias current ms 51015 t on maximum on-time ? 1 1.25 1.5 t off minimum off-time ? 614 dlo output resistance ? 6 14 dhi output resistance a 5.0 6.0 7.0 inductor peak current limit ? 5 10 dlov supply current % 99 99.99 maximum duty cycle ? 200 500 lx input bias current ? 1 lx input quiescent current ? 615 bst supply current units min typ max symbol parameter i int = 1ma v int = 5.65v mv 25 200 ? 1 int output high leakage int output low voltage ns 0 t hd:dat sda hold time from scl ns 250 t su:dat sda setup time from scl ? 4 t high scl high period ? 4.7 t low scl low period ? 4.7 t su:sta start condition setup time from scl ? 4 t hd:sta start condition hold time from scl electrical characteristics (continued) (circuit of figure 1, v dd = +3.3v, v batt = +16.8v, v dcin = +18v, t a = 0? to +85? , unless otherwise noted. typical values are at t a = +25?.) % of v dd % of v dd % of v dd % of v dd dc-to-dc converter specifications thermistor comparator specifications smb interface level specifications (v dd = 2.8v to 5.65v) smb interface timing specifications (v dd = 2.8v to 5.65v, figures 4 and 5)
max1645/max1645a advanced chemistry-independent, level 2 battery chargers with input current limiting _______________________________________________________________________________________ 5 electrical characteristics (continued) (circuit of figure 1, v dd = +3.3v, v batt = +16.8v, v dcin = +18v, t a = 0? to +85? , unless otherwise noted. typical values are at t a = +25?.) conditions units min typ max symbol parameter s 140 175 210 t wdt maximum charge period without a chargingvoltage() or charging current() loaded ? 1 t dv sda output data valid from scl electrical characteristics (circuit of figure 1, v dd = +3.3v, v batt = +16.8v, v dcin = +18v, t a = -40? to +85? , unless otherwise noted. guaranteed by design.) parameter symbol min max units ldo output voltage v ldo 5.15 5.65 v 7 dcin undervoltage threshold 7.85 v dcin supply current charging inhibited 2 ma v dd input voltage range (note 1) 2.8 5.65 v v dd undervoltage threshold 2.8 v 2.1 v dd quiescent current i dd 150 ? dcin typical operating range v dcin 828 v dcin supply current i dcin 6 ma ref output voltage v ref 4.035 4.157 v batt undervoltage threshold (note 2) 2.4 2.8 v pds charging source switch turn-off threshold v pds-off 50 150 mv pds charging source switch threshold hysteresis v pds-hys 100 300 mv pds output low voltage, pds below cssp 812 v pds turn-on current 100 300 ? pds turn-off current 10 ma pdl load switch turn-off threshold v pdl-off -150 -50 mv pdl load switch threshold hysteresis v pdl-hys 100 300 mv pdl turn-off current 6 ma conditions 0 < i ref < 200? 8v < v dcin < 28v, 0 < i ldo < 15ma when i charge drops to 128ma when ac_present switches 8v < v dcin < 28v 8v < v dcin < 28v when the smb res- ponds to commands v cvs referred to v batt , v cvs falling v cvs referred to v batt 0 < v dcin < 6v, v dd = 5v, v scl = 5v, v sda = 5v i pds = 0 pds = cssp v pds = v cssp - 2v, v dcin = 16v v cvs referred to v batt , v cvs rising v cvs referred to v batt v cssn - v pdl = 1v 8v < v dcin < 28v dcin rising dcin falling v dd rising v dd falling general specifications
max1645/max1645a advanced chemistry-independent, level 2 battery chargers with input current limiting 6 _______________________________________________________________________________________ electrical characteristics (continued) (circuit of figure 1, v dd = +3.3v, v batt = +16.8v, v dcin = +18v, t a = -40? to +85? , unless otherwise noted. guaranteed by design.) maximum duty cycle 99 % minimum off-time t off 1 1.5 ? maximum on-time t on 515 ms parameter symbol min max units 4.124 4.260 8.266 8.534 12.391 12.793 batt full-charge voltage v0 16.532 17.068 v batt charge current (note 3) i0 2.608 3.408 a 15.2 240.8 ma dcin source current limit (note 3) 4.358 5.882 a 2.054 3.006 cvs input bias current pdl turn-on resistance 50 150 k ? 20 ? batt undervoltage charge current 20 200 ma batt/csip/csin input voltage range 020 v total batt input bias current -700 700 ? total batt quiescent current -100 100 ? total batt standby current -5 5 ? cssp/input bias current -100 1000 ? cssp/cssn quiescent current -1 1 ? battery voltage-error amp dc gain 200 v/v cls input bias current -1 1 ? battery voltage-error amp transconductance 0.111 0.444 ?/mv battery current-error amp transconductance 0.5 2 ?/mv input current-error amp transconductance 0.5 2 ?/mv ccv/cci/ccs clamp voltage (note 4) 150 600 mv conditions v batt = 1v, r csi = 50m ? chargingvoltage() = 0x1060 chargingvoltage() = 0x20d0 chargingvoltage() = 0x3130 chargingvoltage() = 0x41a0 r csi = 50m ? total of i batt , i csip, and i csin ; v batt = 0 to 20v total of i batt , i csip, and i csin ; v batt = 0 to 20v, charge inhibited r css = 40m ? total of i batt , i csip, and i csin ; v batt = 0 to 20v, v dcin = 0 v cssp = v cssn = v dcin = 28v v cssp = v cssn = 28v, v dcin = 0 pdl to gnd from batt to ccv v cvs = 28v v cls = v ref /2 to v ref from batt to ccv, chargingvoltage() = 0x41a0, v batt = 16.8v from csip/csin to cci, chargingcurrent() = 0x0bc0, v csip -v csin = 150.4mv from cssp/cssn to ccs, v cls = 2.048v, v cssp - v cssn = 102.4mv v ccv = v cci = v ccs = 0.25v to 2v chargingcurrent() = 0x0bc0 chargingcurrent() = 0x0080 v cls = 4.096v v cls = 2.048v cssn input bias current -100 100 ? v cssp = v cssn = v dcin = 28v dc-to-dc converter specifications error amplifier specifications
max1645/max1645a advanced chemistry-independent, level 2 battery chargers with input current limiting _______________________________________________________________________________________ 7 electrical characteristics (continued) (circuit of figure 1, v dd = +3.3v, v batt = +16.8v, v dcin = +18v, t a = -40? to +85? , unless otherwise noted. guaranteed by design.) sda hold time from scl t hd:dat 0 ns start condition hold time from scl start condition setup time from scl t su:sta 4.7 ? t hd:sta 4 ? sda setup time from scl t su:dat 250 ns parameter symbol min max units dlo output resistance 14 ? dhi output resistance 14 ? inductor peak current limit 5.0 7.0 a dlov supply current 10 ? thm input bias current -1 1 ? thermistor overrange threshold 89.5 92.5 thermistor cold threshold 74 77 lx input quiescent current lx input bias current 500 ? 1 ? bst supply current 15 ? thermistor hot threshold 22 25 % of v dd thermistor underrange threshold 69 sda/scl input low voltage 0.6 v sda/scl input high voltage 1.4 v sda/scl input bias current -1 1 ? sda output low sink current 6 ma int output high leakage 1 ? int output low voltage 200 mv scl high period t high 4 ? scl low period t low 4.7 ? conditions v dd = 2.8v to 5.65v, v thm falling dlo high or low, v dlov = 4.5v v dd = 2.8v to 5.65v, v thm falling dhi high or low, v bst - v lx = 4.5v r csi = 50m ? v dlov = v ldo , dlo low v thm = 4% of v dd to 96% of v dd , v dd = 2.8v to 5.65v v dd = 2.8v to 5.65v, v thm falling v dd = 2.8v to 5.65v, v thm falling v dcin = 28v, v batt = v lx = 20v v sda = 0.4v v dcin = 0, v batt = v lx = 20v v int = 5.65v i int = 1ma dhi high % of v dd % of v dd % of v dd smb interface level specifications (v dd = 2.8v to 5.65v) thermistor comparator specifications smb interface timing specifications (v dd = 2.8v to 5.65v, figures 4 and 5)
4.090 4.092 4.096 4.094 4.098 4.100 0 100 50 150 200 250 300 reference voltage load regulation max1645 toc05 load current ( a) v ref (v) 5.20 5.30 5.25 5.35 5.50 5.55 5.45 5.40 5.60 0 46810 2 1214161820 ldo load regulation max1645 toc04 load current (ma) v ldo (v) max1645/max1645a advanced chemistry-independent, level 2 battery chargers with input current limiting 8 _______________________________________________________________________________________ typical operating characteristics (circuit of figure 1, v dcin = 20v, t a = +25?, unless otherwise noted.) load-transient response (battery removal and reinsertion) max1645 toc01 chargingvoltage() = 15000mv chargingcurrent() = 1000ma cci cci cci 16v 14v 12v 1a 0 1.5v v ccv /v cci i batt v batt 1v 0.5v 2ms/div ccv ccv ccv battery removed battery inserted load-transient response (step in load current) max1645 toc02 chargingcurrent() = 3008ma v batt = 16v load step: 0a to 2a i source limit = 2.5a ccs ccs ccs 4a 2a 0 2a 1v 0 1ms/div cci cci cci v ccv /v cci i batt v batt 5.20 5.25 5.30 5.35 5.40 5.45 5.50 5.55 5.60 5 1015202530 ldo line regulation max1645 toc03 v dcin (v) v ldo (v) i load = 0 4.080 4.090 4.085 4.100 4.095 4.105 4.110 -40 20 40 -20 0 60 80 100 reference voltage vs. temperature max1645 toc06 temperature ( c) v ref (v) electrical characteristics (continued) (circuit of figure 1, v dd = +3.3v, v batt = +16.8v, v dcin = +18v, t a = -40? to +85? , unless otherwise noted. guaranteed by design.) note 1: guaranteed by meeting the smb timing specs. note 2: the charger reverts to a trickle-charge mode of i charge = 128ma below this threshold. note 3: does not include current-sense resistor tolerance. note 4: voltage difference between ccv, and cci or ccs when one of these three pins is held low and the others try to pull high. maximum charge period without a chargingvoltage() or charging current() loaded t wdt 140 210 s sda output data valid from scl t dv 1 ? parameter symbol min max units conditions
max1645/max1645a advanced chemistry-independent, level 2 battery chargers with input current limiting _______________________________________________________________________________________ 9 50 65 60 55 70 75 80 85 90 95 100 0 1000 500 1500 2000 2500 3000 efficiency vs. battery current (voltage-control loop) max1645 toc07 battery current (ma) efficiency (%) a: v dcin = 20v, chargingvoltage() = 16.8v b: v dcin = 16v, chargingvoltage() = 8.4v b a 50 65 60 55 70 75 80 85 90 95 100 0 1000 500 1500 2000 2500 3000 efficiency vs. battery current (current-control loop) max1645 toc08 chargingcurrent() (code) efficiency (%) a: v dcin = 20v, v batt = 16.8v b: v dcin = 16v, v batt = 8.4v a b 10 1.0 0.1 0.01 0.001 output vi characteristics max1645 toc09 load current (ma) drop in batt output voltage (%) 0 1500 2000 500 1000 2500 3000 3500 chargingvoltage() = 16,800mv chargingcurrent() = 3008ma -0.3 0 -0.1 -0.2 0.1 0.2 0.3 0000 8000 4000 12000 16000 20000 batt voltage error vs. chargingvoltage() code max1645 toc10 chargingvoltage() (code) batt voltage error (%) i batt = 0 measured at available codes -5 -2 -3 -4 -1 0 1 2 3 4 5 0 1000 500 1500 2000 2500 3000 current-setting error vs. chargingcurrent() code max1645 toc11 chargingcurrent() (code) batt current error (%) v batt = 12.6v measured at available codes 0 1.0 0.5 2.0 1.5 3.0 2.5 3.5 0 1.0 0.5 1.5 2.0 2.5 source/batt current vs. load current with source current limit max1645 toc12 load current (a) source/batt current (a) i in i batt v cls = 2v r css = 40m ? v batt = 16.8v source current limit = 2.5a chargingcurrent() = 3008ma chargingvoltage() = 18,432mv 0 1.0 0.5 2.0 1.5 3.0 2.5 3.5 04 2 6 8 101214161820 source/batt current vs. v batt with source current limit max1645 toc13 v batt (v) source/batt current (a) i in i batt i load = 2a v cls = 2v r css = 40m ? chargingvoltage() = 18,432mv chargingcurrent() = 3008ma source current limit = 2.5a typical operating characteristics (continued) (circuit of figure 1, v dcin = 20v, t a = +25?, unless otherwise noted.)
max1645/max1645a advanced chemistry-independent, level 2 battery chargers with input current limiting 10 ______________________________________________________________________________________ pin description battery voltage output batt 9 dac voltage output dac 10 logic circuitry supply voltage input (2.8v to 5.65v) v dd 11 thermistor voltage input thm 12 smb clock input scl 13 charging source compensation capacitor connection. connect a 0.01? capacitor from ccs to gnd. ccs 5 battery current-loop compensation capacitor connection. connect a 0.01? capacitor from cci to gnd. cci 6 battery voltage-loop compensation capacitor connection. connect a 10k ? resistor in series with a 0.01? capacitor to gnd. ccv 7 ground gnd 8 4.096v reference voltage output ref 4 source current limit input cls 3 pin 5.4v linear-regulator voltage output. bypass with a 1? capacitor to gnd. ldo 2 dc supply voltage input dcin 1 function name inductor voltage sense input lx 22 high-side nmos driver output dhi 23 high-side driver bootstrap voltage input. bypass with 0.1? capacitor to lx. bst 24 charging source current-sense negative input cssn 25 charging source current-sense positive input cssp 26 battery current-sense positive input csip 18 power ground pgnd 19 low-side nmos driver output dlo 20 low-side nmos driver supply voltage. bypass with 0.1? capacitor to gnd. dlov 21 battery current-sense negative input csin 17 pmos load switch driver output pdl 16 interrupt output. open-drain output. needs external pull-up. int 15 smb data input/output. open-drain output. needs external pull-up. sda 14 charging source pmos switch driver output pds 27 charging source voltage input cvs 28
max1645/max1645a advanced chemistry-independent, level 2 battery chargers with input current limiting ______________________________________________________________________________________ 11 detailed description the max1645/max1645a consist of current-sense amplifiers, an smbus interface, transconductance amplifiers, reference circuitry, and a dc?c converter (figure 2). the dc?c converter generates the control signals for the external mosfets to maintain the volt- age and the current set by the smbus interface. the max1645/max1645a feature a voltage-regulation loop and two current-regulation loops. the loops operate independently of each other. the voltage-regulation loop monitors batt to ensure that its voltage never exceeds the voltage set point (v0). the battery current- regulation loop monitors current delivered to batt to ensure that it never exceeds the current-limit set point (i0). the battery current-regulation loop is in control as long as batt voltage is below v0. when batt voltage reaches v0, the current loop no longer regulates. a third loop reduces the battery-charging current when the sum of the system (the main load) and the battery charger input current exceeds the charging source cur- rent limit. setting output voltage the max1645/max1645a voltage dacs have a 16mv lsb and an 18.432v full scale. the smbus specifica- tion allows for a 16-bit chargingvoltage() command that translates to a 1mv lsb and a 65.535v full-scale voltage; therefore, the chargingvoltage() value corre- sponds to the output voltage in millivolts. the max1645/max1645a ignore the first four lsbs and use the next 11 lsbs to control the voltage dac. all codes greater than or equal to 0b0100 1000 0000 0000 (18432mv) result in a voltage overrange, limiting the charger voltage to 18.432v. all codes below 0b0000 0100 0000 0000 (1024mv) terminate charging. setting output current the max1645/max1645a current dacs have a 64ma lsb and a 3.008a full scale. the smbus specification allows for a 16-bit chargingcurrent() command that translates to a 1ma lsb and a 65.535a full-scale cur- rent; the chargingcurrent() value corresponds to the charging voltage in milliamps. the max1645/ max1645a drop the first six lsbs and use the next six lsbs to control the current dac. all codes above 0b00 1011 1100 0000 (3008ma) result in a current overrange, limiting the charger current to 3.008a. all codes below 0b0000 0000 1000 0000 (128ma) turn the charging current off. a 50m ? sense resistor (r2 in figure 1) is required to achieve the correct code/cur- rent scaling. input current limiting the max1645/max1645a limit the current drawn by the charger when the load current becomes high. the devices limit the charging current so the ac adapter voltage is not loaded down. an internal amplifier, css, compares the voltage between cssp and cssn to the voltage at cls/20. v cls is set by a resistor-divider between ref and gnd. the input source current is the sum of the device cur- rent, the charge input current, and the load current. the device current is minimal (6ma max) in comparison to the charge and load currents. the charger input cur- rent is generated by the dc-dc converter; therefore, the actual source current required is determined as follows: i source = i load + [(i charge v batt) / (v in )] where is the efficiency of the dc-dc converter (typi- cally 85% to 95%). v cls determines the threshold voltage of the css com- parator. r3 and r4 (figure 1) set the voltage at cls. sense resistor r1 sets the maximum allowable source current. calculate the maximum current as follows: i max = v cls / (20 r 1 ) (limit v cssp - v cssn to between 102.4mv and 204.8mv.) the configuration in figure 1 provides an input current limit of: i max = (2.048v / 20) / 0.04 ? = 2.56a ldo regulator an integrated ldo regulator provides a +5.4v supply derived from dcin, which can deliver up to 15ma of current. the ldo sets the gate-drive level of the nmos switches in the dc-dc converter. the drivers are actu- ally powered by dlov and bst, which must be con- nected to ldo through a lowpass filter and a diode as shown in figure 1. see also the mosfet drivers sec- tion. the ldo also supplies the 4.096v reference and most of the control circuitry. bypass ldo with a 1? capacitor. v dd supply this input provides power to the smbus interface and the thermistor comparators. typically connect v dd to ldo or, to keep the smbus interface of the max1645/max1645a active while the supply to dcin is removed, connect an external supply to v dd .
max1645/max1645a advanced chemistry-independent, level 2 battery chargers with input current limiting 12 ______________________________________________________________________________________ load adapter in max1645a cvs dcin ref cls gnd dac ccv cci ccs pds cssp cssn ldo dhi lx dlov bst pgnd dlo csip csin pdl batt thm v dd scl sda int battery host d4 1n4148 c5 1 f r13 1k c23 0.1 f c7 1 f r3 100k r4 100k c8 0.1 f c9 0.01 f r5 10k c11 0.01 f c10 0.01 f p1 fds6675 d1 1n5821 c2 22 f c1 22 f r1 0.04 ? c20, 1 f c19, 1 f r14 4.7 ? r15 4.7 ? c6 1 f d3 1n4148 r12 33 ? c16 0.1 f c14 0.1 f n1 fds6680 n2 fds6612a l1 22 h d2 1n5821 r9 10k c12 1 f r8 10k r6 10k r10 10k c13 1.5nf r7 10k r2 0.05 ? p2 fds6675 c4 22 f c3 22 f c18 0.1 f r16 1 ? r11 1 ? c24 0.1 f figure 1. typical application circuit
max1645/max1645a advanced chemistry-independent, level 2 battery chargers with input current limiting ______________________________________________________________________________________ 13 lvc gms pds vl ref pdl css cssp cssn cls csip csin v dd scl sda thm csi batt gmi gmv smb daci dacv temp dc-dc dhi bst dhi lx dlov dlo pgnd ccs cci ccv cvs batt pds pdl dcin ldo ref gnd dac dlo max1645/max1645a int figure 2. functional diagram
max1645/max1645a advanced chemistry-independent, level 2 battery chargers with input current limiting 14 ______________________________________________________________________________________ operating conditions the max1645/max1645a change their operation depending on the voltages at dcin, batt, v dd, and thm. several important operating states follow: ac present. when dcin is > 7.5v, the battery is considered to be in an ac present state. in this con- dition, both the ldo and ref will function properly and battery charging is allowed. when ac is pre- sent, the ac_present bit (bit 15) in the chargerstatus() register is set to ?. power fail. when dcin is < batt + 0.3v, the part is in the power fail state, since the charger doesn? have enough input voltage to charge the battery. in power fail, the pds input pmos switch is turned off and the power_fail bit (bit 13) in the chargerstatus() register is set to ?. battery present. when thm is < 91% of v dd , the battery is considered to be present. the max1645/ max1645a use the thm pin to detect when a battery is connected to the charger. when the battery is pre- sent, the battery_present bit (bit 14) in the chargerstatus() register is set to ??and charging can proceed. when the battery is not present, all of the registers are reset. with no battery present, the charger will perform a "float" charge to minimize contact arcing on battery connection. "float" charge will still try to regulate the batt pin voltage at 18.32v with 128ma of current compliance. battery undervoltage. when batt < 2.5v, the bat- tery is in an undervoltage state. this causes the charger to reduce its current compliance to 128ma. the content of the chargingcurrent() register is unaf- fected and, when the batt voltage exceeds 2.7v, normal charging resumes. chargingvoltage() is unaf- fected and can be set as low as 1.024v. v dd undervoltage. when v dd < 2.5v, the v dd sup- ply is in an undervoltage state, and the smbus inter- face will not respond to commands. coming out of the undervoltage condition, the part will be in its power-on reset state. no charging will occur when v dd is under voltage. smbus interface the max1645/max1645a receive control inputs from the smbus interface. the serial interface complies with the smbus specification (refer to the system management bus specification from intel corporation). charger functionality complies with the intel/duracell smart charger specification for a level 2 charger. the max1645/max1645a use the smbus read-word and write-word protocols to communicate with the bat- tery being charged, as well as with any host system that monitors the battery-to-charger communications as a level 2 smbus charger. the max1645/max1645a are smbus slave devices and do not initiate communi- cation on the bus. they receive commands and respond to queries for status information. figure 3 shows examples of the smbus write-word and read- word protocols, and figures 4 and 5 show the smbus serial-interface timing. each communication with these parts begins with the master issuing a start condition that is defined as a falling edge on sda with scl high and ends with a stop condition defined as a rising edge on sda with scl high. between the start and stop conditions, the device address, the command byte, and the data bytes are sent. the max1645/max1645as?device address is 0x12 and supports the charger commands as described in tables 1?. battery charger commands chargerspecinfo() the chargerspecinfo() command uses the read-word protocol (figure 3b). the command code for chargerspecinfo() is 0x11 (0b00010001). table 1 lists the functions of the data bits (d0?15). bit 0 refers to the d0 bit in the read-word protocol. the max1645/max1645a comply with level 2 smart battery charger specification revision 1.0; therefore, the chargerspecinfo() command returns 0x01. chargermode() the chargermode() command uses the write-word protocol (figure 3a). the command code for chargermode() is 0x12 (0b00010010). table 2 lists the functions of the data bits (d0?15). bit 0 refers to the d0 bit in the write-word protocol. to charge a battery that has a thermistor impedance in the hot range (i.e., thermistor_hot = 1 and ther- mistor_ur = 0), the host must use the charger mode() command to clear hot_stop after the battery is inserted. the hot_stop bit returns to its default power-up condition (?? whenever the battery is removed. chargerstatus() the chargerstatus() command uses the read-word protocol (figure 3b). the command code for charger status() is 0x13 (0b00010011). table 3 describes the functions of the data bits (d0?15). bit 0 refers to the d0 bit in the read-word protocol. the chargerstatus() command returns information about thermistor impedance and the max1645/ max1645a? internal state. the latched bits, thermis- tor_hot and alarm_inhibited, are cleared when-
max1645/max1645a ______________________________________________________________________________________ 15 advanced chemistry-independent, level 2 battery chargers with input current limiting figure 3. smbus a) write-word and b) read-word protocols preset to 0b0001001 d7 d0 d15 d8 chargermode() = 0x12 chargingcurrent() = 0x14 chargervoltage() = 0x15 alarmwarning() = 0x16 preset to 0b0001001 preset to 0b0001001 d7 d0 d15 d8 chargerspecinfo() = 0x11 chargerstatus() = 0x13 0 1b ack 0 msb lsb 1b 8 bits ack command byte 0 msb lsb 1b 7 bits w slave address s 0 msb lsb 1b 8 bits ack low data byte p 0 msb lsb 1b 8 bits ack high data byte a) write-word format b) read-word format legend: s = start condition or repeated start condition p = stop condition ack = acknowledge (logic low) nack = not acknowledge (logic high) w = write bit (logic low) r = read bit (logic high) master to slave slave to master high data byte nack 8 bits 1b msb lsb 1 p low data byte ack 8 bits 1b msb lsb 0 slave address r 7 bits 1b msb lsb 1 ack 1b 0 command byte ack 8 bits 1b msb lsb 0 s ack 1b 0 s slave address w 7 bits 1b msb lsb 0 ever battery_present = 0 or chargermode() is writ- ten with por_reset = 1. the alarm_inhibited sta- tus bit can also be cleared by writing a new charging current or charging voltage.
max1645/max1645a advanced chemistry-independent, level 2 battery chargers with input current limiting 16 ______________________________________________________________________________________ start condition most significant address bit (a6) clocked into slave a5 clocked into slave a4 clocked into slave a3 clocked into slave t high t low t hd:sta t su:sta t su:dat t hd:dat scl sda t su:dat t hd:dat t dv slave pulling sda low t dv most significant bit of data clocked into master acknowledge bit clocked into master r/w bit clocked into slave scl sda figure 4. smbus serial interface timing?ddress figure 5. smbus serial interface timing?cknowledgment
max1645/max1645a advanced chemistry-independent, level 2 battery chargers with input current limiting ______________________________________________________________________________________ 17 returns a ? reserved 8 returns a ? reserved 9 returns a ? reserved 10 returns a ? reserved 11 returns a ? reserved 12 returns a ?,?indicating no smart battery selector functionality selector_support 4 returns a ? reserved 5 returns a ? reserved 6 returns a ? reserved 7 returns a ??for version 1.0 charger_spec 3 returns a ??for version 1.0 charger_spec 2 returns a ??for version 1.0 charger_spec 1 returns a ??for version 1.0 charger_spec 0 description name returns a ? reserved 15 returns a ? reserved 14 returns a ? reserved 13 table 1. chargerspecinfo() command: 0x11 bit
max1645/max1645a advanced chemistry-independent, level 2 battery chargers with input current limiting 18 ______________________________________________________________________________________ table 2. chargermode() command: 0x12 *state at chip initial power-on (i.e., v dd from 0 to +3.3v) 13 not implemented 14 not implemented 15 not implemented name description 0 inhibit_charge 0* = allow normal operation; clear the chg_inhibited flip-flop. 1 = turn off the charger; set the chg_inhibited flip-flop. the chg_inhibited flip-flop is not affected by any other commands. 1 enable_polling not implemented bit 2 por_reset 0 = no change. 1 = change the chargingvoltage() to 0xffff and the chargingcurrent() to 0x00c0; clear the thermistor_hot and alarm_inhibited flip- flops. 3 reset_to_zero not implemented 7 not implemented 6 power_fail_mask 0* = interrupt on either edge of the power_fail status bit. 1 = do not interrupt because of a power_fail bit change. 5 battery_present_ mask 0* = interrupt on either edge of the battery_present status bit. 1 = do not interrupt because of a battery_present bit change. 4 ac_present_mask 0* = interrupt on either edge of the ac_present status bit. 1 = do not interrupt because of an ac_present bit change. 12 not implemented 11 not implemented 10 hot_stop 0 = the thermistor_hot status bit does not turn off the charger. 1* = the thermistor_hot status bit does turn off the charger. thermistor_hot is reset by either por_reset or battery_present = 0 status bit. 9 not implemented 8 not implemented
max1645/max1645a advanced chemistry-independent, level 2 battery chargers with input current limiting ______________________________________________________________________________________ 19 name function 0 charge_inhibited 0* = ready to charge smart battery. 1 = charger is inhibited, i(chg) = 0ma. this status bit returns the value of the chg_inhibited flip-flop. 1 master_mode always returns ? bit 2 voltage_not_reg 0 = battery voltage is limited at the set point. 1 = battery voltage is less than the set point. 3 current_not_reg 0 = battery current is limited at the set point. 1 = battery current is less than the set point. 7 voltage_or 0 = the chargingvoltage() value is valid for the max1645. 1* = the chargingvoltage() value exceeds the max1645 output range, i.e., programmed chargingvoltage() exceeds 1843mv. 6 current_or 0* = the chargingcurrent() value is valid for the max1645. 1 = the chargingcurrent() value exceeds the max1645 output range, i.e., programmed chargingcurrent() exceeds 3008ma. 5 level_3 always returns a ? 4 level_2 always returns a ? 12 alarm_inhibited returns the state of the alarm_inhibited flip-flop. this flip-flop is set by either a watchdog timeout or by writing an alarmwarning() command with bits 11, 12, 13, 14, or 15 set. this flip-flop is cleared by battery_present = 0, writing a ??into the por_reset bit in the chargermode() command, or by receiving successive chargingvoltage() and chargingcurrent() commands. por: 0. 11 thermistor_ur 0 = thm is > 7.5% of the reference voltage. 1 = thm is < 7.5% of the reference voltage. 10 thermistor_hot 0 = thm has not dropped to < 23.5% of the reference voltage. 1 = thm has dropped to < 23.5% of the reference voltage. thermistor_hot flip-flop cleared by battery_present = 0 or writing a ??into the por_reset bit in the chargermode() command. 9 thermistor_cold 0 = thm is < 75.5% of the reference voltage. 1 = thm is > 75.5% of the reference voltage. 8 thermistor_or 0 = thm is < 91% of the reference voltage. 1 = thm is > 91% of the reference voltage. table 3. chargerstatus() 15 ac_present 0 = dcin is below the 7.5v undervoltage threshold. 1 = dcin is above the 7.5v undervoltage threshold. 14 battery_present 0 = no battery is present (based on thm input). 1 = battery is present (based on thm input). 13 power_fail 0 = the charging source voltage cvs is above the batt voltage. 1 = the charging source voltage cvs is below the batt voltage. command: 0x13 *state at chip initial power-on.
max1645/max1645a advanced chemistry-independent, level 2 battery chargers with input current limiting 20 ______________________________________________________________________________________ table 4. chargercurrent() command: 0x14 name function 0 not used. normally a 1ma weight. 1 not used. normally a 2ma weight. bit 2 not used. normally a 4ma weight. 3 not used. normally an 8ma weight. 7 charge current, daci 1 0 = adds 0ma of charger-current compliance. 1 = adds 128ma of charger-current compliance. 6 charge current, daci 0 0 = adds 0ma of charger-current compliance. 1 = adds 64ma of charger-current compliance, 128ma min. 5 not used. normally a 32ma weight. 4 not used. normally a 16ma weight. 12?5 0 = adds 0ma of charger current compliance. 1 = sets charger compliance into overrange, 3008ma. 11 charge current, daci 5 0 = adds 0ma of charger-current compliance. 1 = adds 2048ma of charger-current compliance, 3008ma max. 10 charge current, daci 4 0 = adds 0ma of charger-current compliance. 1 = adds 1024ma of charger-current compliance. 9 charge current, daci 3 0 = adds 0ma of charger-current compliance. 1 = adds 512ma of charger-current compliance. 8 charge current, daci 2 0 = adds 0ma of charger-current compliance. 1 = adds 256ma of charger-current compliance.
max1645/max1645a advanced chemistry-independent, level 2 battery chargers with input current limiting ______________________________________________________________________________________ 21 table 5. chargingvoltage() command: 0x15 bit name function 0 not used. normally a 1mv weight. 1 not used. normally a 2mv weight. pin 2 not used. normally a 4mv weight. 3 not used. normally an 8mv weight. 7 charge voltage, dacv 3 0 = adds 0mv of charger-voltage compliance. 1 = adds 128mv of charger-voltage compliance, 1.024v min. 6 charge voltage, dacv 2 0 = adds 0mv of charger-voltage compliance. 1 = adds 64mv of charger-voltage compliance, 1.024v min. 5 charge voltage, dacv 1 0 = adds 0mv of charger-voltage compliance. 1 = adds 32mv of charger-voltage compliance, 1.024v min. 4 charge voltage, dacv 0 0 = adds 0mv of charger-voltage compliance. 1 = adds 16mv of charger-voltage compliance, 1.024v min. 12 charge voltage, dacv 8 0 = adds 0mv of charger-voltage compliance. 1 = adds 4096mv of charger-voltage compliance. 11 charge voltage, dacv 7 0 = adds 0mv of charger-voltage compliance. 1 = adds 2048mv of charger-voltage compliance. 10 charge voltage, dacv 6 0 = adds 0ma of charger-voltage compliance. 1 = adds 1024mv of charger-voltage compliance. 9 charge voltage, dacv 5 0 = adds 0mv of charger-voltage compliance. 1 = adds 512mv of charger-voltage compliance, 1.024v min. 8 charge voltage, dacv 4 0 = adds 0mv of charger-voltage compliance. 1 = adds 256mv of charger-voltage compliance, 1.024v min. 13 charge voltage, dacv 9 0 = adds 0mv of charger-voltage compliance. 1 = adds 8192mv of charger-voltage compliance. 14 charge voltage, dacv 10 0 = adds 0mv of charger-voltage compliance. 1 = adds 16384mv of charger-voltage compliance, 18432mv max. 15 charge voltage, overrange 0 = adds 0mv of charger-voltage compliance. 1 = sets charger compliance into overrange, 18432mv.
max1645/max1645a advanced chemistry-independent, level 2 battery chargers with input current limiting 22 ______________________________________________________________________________________ table 6. alarmwarning() command: 0x16 13 other_alarm 0 = charge normally 1 = terminate charging 14 terminate _ charge_ alarm 0 = charge normally 1 = terminate charging 15 over_charge_alarm 0 = charge normally 1 = terminate charging bit name description 0 error code not used 1 error code not used bit 2 error code not used 3 error code not used 7 initializing not used 6 discharging not used 5 fully_charged not used 4 fully_discharged not used 12 over_temp_alarm 0 = charge normally 1 = terminate charging 11 terminate_ discharge_alarm 0 = charge normally 1 = terminate charging 10 reserved not used 9 remaining_capacity_ alarm not used 8 remaining_time_ alarm not used
max1645/max1645a advanced chemistry-independent, level 2 battery chargers with input current limiting ______________________________________________________________________________________ 23 chargingcurrent() (por: 0x0080) the chargingcurrent() command uses the write-word protocol (figure 3a). the command code for charging- current() is 0x14 (0b00010100). the 16-bit binary num- ber formed by d15?0 represents the current-limit set point (i0) in milliamps. however, since the max1645/max1645a have 64ma resolution in setting i0, the d0?5 bits are ignored as shown in table 4. figure 6 shows the mapping between i0 (the current- regulation-loop set point) and the chargingcurrent() code. all codes above 0b00 1011 1100 0000 (3008ma) result in a current overrange, limiting the charger current to 3.008a. all codes below 0b0000 0000 1000 0000 (128ma) turn the charging current off. a 50m ? sense resistor (r2 in figure 1) is required to achieve the cor- rect code/current scaling. the power-on reset value for the chargingcurrent() reg- ister is 0x0080; thus, the first time a max1645/ max1645a is powered on, the batt current regulates to 128ma. any time the battery is removed, the chargingcurrent() register returns to its power-on reset state. chargingvoltage() (por: 0x4800) the chargingvoltage() command uses the write-word protocol (figure 3a). the command code for chargingvoltage() is 0x15 (0b00010101). the 16-bit binary number formed by d15?0 represents the volt- age set point (v0) in millivolts; however, since the max1645/max1645a have 16mv resolution in setting v0, the d0, d1, d2, and d3 bits are ignored as shown in table 5. the chargingvoltage command is used to set the bat- tery charging voltage compliance from 1.024v to 18.432v. all codes greater than or equal to 0b0100 1000 0000 0000 (18432mv) result in a voltage over- range, limiting the charger voltage to 18.432v. all codes below 0b0000 0100 0000 0000 (1024mv) terminate charge. figure 7 shows the mapping between v0 (the voltage-regulation-loop set point) and the chargingvoltage() code. the power-on reset value for the chargingvoltage() reg- ister is 0x4880; thus, the first time a max1645/ max1645a are powered on, the batt voltage regulates to 18.432v. any time the battery is removed, the chargingvoltage() register returns to its power-on reset state. the voltage at dac corresponds to the set com- pliance voltage divided by 4.5. alarmwarning() (por: not alarm) the alarmwarning() command uses the write-word protocol (figure 3a). the command code for alarmwarning() is 0x16 (0b00010110). alarmwarning() sets the alarm_inhibited status bit in the max1645/max1645a if d15, d14, d13, d12, or d11 of the write-word protocol data equals 1. table 6 summa- rizes the alarm-warning() command? function. the alarm_inhibited status bit remains set until the bat- tery is removed, a chargermode() command is written with the por_reset bit set, or new chargingcurrent() and chargingvoltage() values are written. as long as alarm_inhibited = 1, the max1645/max1645a switching regulators remain off. interrupts and alert response address the max1645/max1645a request an interrupt by pulling the int pin low. an interrupt is normally request- ed when there is a change in the state of the chargerstatus() bits power_fail (bit 13), battery_present (bit 14), or ac_present (bit 15). therefore, the int pin will pull low whenever the ac adapter is connected or disconnected, the battery is inserted or removed, or the charger goes in or out of dropout. the interrupts from each of the chargerstatus() bits can be masked by an associated chargermode() bit power_fail_mask (bit 6), battery_pre- sent_mask (bit 5), or ac_present_mask (bit 4). all interrupts are cleared by sending any command to the max1645/max1645a, or by sending a command to the alertresponse() address, 0x19, using a modified receive byte protocol. in this protocol, all devices that set an interrupt will try to respond by transmitting their address, and the device with the highest priority, or most leading 0?, will be recognized and cleared. the process will be repeated until all devices requesting interrupts are addressed and cleared. the max1645/ 6.4 0x0080 128 2048 65535 0x0800 0xffff 3008 0x0bc0 1024 0x0400 51.2 150.4 average (csip-csin) voltage in current regulation (mv) 102.4 figure 6. average voltage between csip and csin vs. charging current() code
max1645/max1645a advanced chemistry-independent, level 2 battery chargers with input current limiting 24 ______________________________________________________________________________________ max1645a respond to the alertresponse() address with 0x13, which is their address and a trailing ?. charger timeout the max1645/max1645a include a timer that termi- nates charge if the charger has not received a chargingvoltage() or chargingcurrent() command in 175sec. during charging, the timer is reset each time a chargingvoltage() or chargingcurrent() command is received; this ensures that the charging cycle is not ter- minated. if timeout occurs, charging will terminate and both chargingvoltage() and chargingcurrent() commands are required to restart charging. a power-on reset will also restart charging at 128ma. dc-to-dc converter the max1645/max1645a employ a buck regulator with a boot-strapped nmos high-side switch and a low-side nmos synchronous rectifier. dc-dc controller the control scheme is a constant off-time, variable fre- quency, cycle-by-cycle current mode. the off-time is constant for a given batt voltage; it varies with v batt to keep the ripple current constant. during low-dropout operation, a maximum on-time of 10ms allows the con- troller to achieve >99% duty cycle with continuous con- duction. figure 8 shows the controller functional diagram. 16.800v 18.432v v ref = 4.096v vdcin > 20v 0 1.024v 0 0x0400 0x20dx 0x41a0 0x313x 0x4800 0x106x 4.192v 12.592v chargingvoltage() d15?0 data voltage set point (v0) 8.400v 0xffff figure 7. chargingvoltage() code to voltage mapping
max1645/max1645a advanced chemistry-independent, level 2 battery chargers with input current limiting ______________________________________________________________________________________ 25 figure 8. dc-to-dc converter functional diagram imax reset 4.0v 0.25v 0.1v 10ms lvc control on ccv cci ccs gms gmi gmv dacv daci cls dlo dhi csi 1 s bst s rq ccmp zcmp imin chg rq s css cssp adapter in cssn bst dhi lx r1 ldo c bst l1 r2 dlo csip csin c out batt battery max1645/max1645a r fc 70k r fi 20k q
mosfet drivers the low-side driver output dlo swings from 0v to dlov. dlov is usually connected through a filter to ldo. the high-side driver output dhi is bootstrapped off lx and swings from v lx to v bst . when the low-side driver turns on, bst rises to one diode voltage below dlov. filter dlov with an rc circuit whose cutoff frequency is about 50khz. the configuration in figure 1 intro- duces a cutoff frequency of around 48khz. f = 1 / 2 rc = 1 / (2 ? 33 ? 0.1?) = 48khz thermistor comparators four thermistor comparators evaluate the voltage at the thm input to determine the battery temperature. this input is meant to be used with the internal thermistor connected to ground inside the battery pack. connect the output of the battery thermistor to thm. connect a resistor from thm to v dd . the resistor-divider sets the voltage at thm. when the charger is not powered up, the battery temperature can still be determined if v dd is powered from an external voltage source. thermistor bits figure 9 shows the expected electrical behavior of a 103etb-type thermistor (nominally 10k ? at +25? ?% or better) to be used with the max1645/max1645a: thermistor_or bit is set when the thermistor value is >100k ? . this indicates that the thermistor is open or a battery is not present. the charger is set to por, and the battery_present bit is cleared. thermistor_cold bit is set when the thermistor value is >30k ? . the thermistor indicates a cold bat- tery. this bit does not affect the charge. thermistor_hot bit is set when the thermistor value is <3k ? . this is a latched bit and is cleared by removing the battery or sending a por with the chargermode() command. the max1645 charger is stopped unless the hot_stop bit is cleared in the chargermode() command. the max1645a charger is stopped unless the hot_stop bit is cleared in the chargermode() command or the res_ur bit is set. see table 7. thermistor_ur bit is set when the thermistor value is <500 ? (i.e., thm is grounded). multiple bits may be set depending on the value of the thermistor (e.g., a thermistor that is 450 ? will cause both the thermistor_hot and the thermistor_ur bits to be set). the thermistor may be replaced by fixed- value resistors in battery packs that do not require the thermistor as a secondary fail-safe indicator. in this max1645/max1645a advanced chemistry-independent, level 2 battery chargers with input current limiting 26 ______________________________________________________________________________________ 1000 100 10 resistance (k ? ) 1 0.1 -40 -50 -30 -20 -10 0 10 20 30 40 50 60 70 80 90 100 110 temperature ( c) figure 9. typical thermistor characteristics table 7. thermistor bit settings *see battery present item under operating conditions for more information. controlled charge not allowed by max1645 allowed by max1645a not allowed allowed allowed not allowed wake-up charge not allowed by max1645 allowed for timeout period by max1645a not allowed allowed for timeout period allowed for timeout period float charge* description under range under range hot normal cold over range reg_ur and res_hot res_ur and res_hot thermistor status bit res_hot (none) res_or and res_cold res_cold
max1645/max1645a advanced chemistry-independent, level 2 battery chargers with input current limiting ______________________________________________________________________________________ 27 case, it is the responsibility of the battery pack to manip- ulate the resistance to obtain correct charger behavior. load and source switch drivers the max1645/max1645a can drive two p-channel mosfets to eliminate voltage drops across the schottky diodes, which are normally used to switch the load current from the battery to the main dc source: the source switch p1 is controlled by pds. this p- channel mosfet is turned on when cvs rises to 300mv above batt and turns off when cvs falls to 100mv above batt. the same signal that controls the pds also sets the power_fail bit in the charger status() register. see operating conditions . the load switch p2 is controlled by pdl. this p- channel mosfet is turned off when the cvs rises to 100mv below batt and turns on when cvs falls to 300mv below batt. dropout operation the max1645/max1645a have a 99.99% duty-cycle capability with a 10ms maximum on-time and 1? off- time. this allows the charger to achieve dropout perfor- mance limited only by resistive losses in the dc-dc converter components (p1, r1, n1, r2; see figure 1). the actual dropout voltage is limited to 300mv between cvs and batt by the power-fail comparator (see operating conditions) . applications information smart battery charging system/background information a smart battery charging system, at a minimum, con- sists of a smart battery and smart battery charger com- patible with the smart battery system specifications using the smbus. a system may use one or more smart batteries. figure 10 shows a single-battery system. this configuration is typically found in notebook computers, video cameras, cellular phones, or other portable electronic equipment. another configuration uses two or more smart batteries (figure 11). the smart battery selector is used either to system power control ac-dc converter (unregulated) ac system power supply dc (unregulated) / v battery safety signal v battery dc (unregulated) v cc +12v, -12v system host (smbus host) smart battery critical events critical events charging voltage/current requests battery data/status requests smart battery charger smbus max1645a figure 10. typical single smart battery system
max1645/max1645a advanced chemistry-independent, level 2 battery chargers with input current limiting 28 ______________________________________________________________________________________ connect batteries to the smart battery charger or the system, or to disconnect them, as appropriate. for each battery, three connections must be made: power (the battery? positive and negative terminals), the smbus (clock and data), and the safety signal (resis- tance, typically temperature dependent). additionally, the system host must be able to query any battery so it can display the state of all batteries present in the system. figure 11 shows a two-battery system where battery 2 is being charged while battery 1 is powering the sys- tem. this configuration may be used to ?ondition?bat- tery 1, allowing it to be fully discharged prior to recharge. smart battery charger types two types of smart battery chargers are defined: level 2 and level 3. all smart battery chargers communicate with the smart battery using the smbus; the two types differ in their smbus communication mode and whether they modify the charging algorithm of the smart battery figure 11. typical system using multiple smart batteries ac-dc converter (unregulated) ac dc (unregulated) / v battery note: sb 1 powering system sb 2 charging v cc +12v, -12v system host (smbus host) smart battery selector smbus smbus smbus safety signal v charge v batt safety signal v batt safety signal smart battery 1 smart battery 2 critical events battery data/status requests smart battery charger smbus max1645a system power supply level 3 level 3 level 2 level 3 slave/master slave only modified from battery charge algorithm source battery smbus mode table 8. smart battery charger type by smbus mode and charge algorithm source note: level 1 smart battery chargers were defined in the ver- sion 0.95a specification. while they can correctly interpret smart battery end-of-charge messages, minimizing over- charge, they do not provide truly chemistry-independent charging. they are no longer defined by the smart battery charger specification and are explicitly not compliant with this and subsequent smart battery charger specifications.
max1645/max1645a advanced chemistry-independent, level 2 battery chargers with input current limiting ______________________________________________________________________________________ 29 (table 8). level 3 smart battery chargers are supersets of level 2 chargers and, as such, support all level 2 charger commands. level 2 smart battery charger the level 2 or smart battery-controlled smart battery charger interprets the smart battery? critical warning messages and operates as an smbus slave device to respond to the smart battery? chargingvoltage() and chargingcurrent() messages. the charger is obliged to adjust its output characteristics in direct response to the chargingvoltage() and chargingcurrent() mes- sages it receives from the battery. in level 2 charging, the smart battery is completely responsible for initiating the communication and providing the charging algo- rithm to the charger. the smart battery is in the best position to tell the smart battery charger how it needs to be charged. the charg- ing algorithm in the battery may request a static charge condition or may choose to periodically adjust the smart battery charger? output to meet its present needs. a level 2 smart battery charger is truly chem- istry independent and, since it is defined as an smbus slave device only, the smart battery charger is relatively inexpensive and easy to implement. selecting external components table 10 lists the recommended components and refers to the circuit of figure 1; table 9 lists the suppli- ers?contacts. the following sections describe how to select these components. mosfets and schottky diodes schottky diode d1 provides power to the load when the ac adapter is inserted. choose a 3a schottky diode or higher. this diode may not be necessary if p1 is used. the p-channel mosfet p1 turns on when v cvs > v batt . this eliminates the voltage drop and power con- sumption of the schottky diode. to minimize power loss, select a mosfet with an r ds(on) of 50m ? or less. this mosfet must be able to deliver the maximum current as set by r1. d1 and p1 provide protection from reversed voltage at the adapter input. the n-channel mosfets n1 and n2 are the switching devices for the buck controller. high-side switch n1 should have a current rating of at least 6a and have an r ds(on) of 50m ? or less. the driver for n1 is powered by bst; its current should be less than 10ma. select a mosfet with a low total gate charge and determine the required drive current by i gate = q gate f (where f is the dc-dc converter maximum switching frequency of 400khz). the low-side switch n2 should also have a current rat- ing of at least 3a, have an r ds(on) of 100m ? or less, and a total gate charge less than 10nc. n2 is used to provide the starting charge to the bst capacitor c14. during normal operation, the current is carried by schottky diode d2. choose a 3a or higher schottky diode. d3 is a signal-level diode, such as the 1n4148. this diode provides the supply current to the high-side mosfet driver. the p-channel mosfet p2 delivers the current to the load when the ac adapter is removed. select a mos- fet with an r ds(on) of 50m ? or less to minimize power loss and voltage drop. inductor selection inductor l1 provides power to the battery while it is being charged. it must have a saturation current of at least 3a plus 1 / 2 of the current ripple ( ? i l ). i sat = 3a + 1 / 2 ? i l the controller determines the constant off-time period, which is dependent on batt voltage. this makes the ripple current independent of input and battery voltage and should be kept to less than 1a. calculate the ? i l with the following equation: ? i l = 21v? / l higher inductor values decrease the ripple current. smaller inductor values require higher saturation cur- capacitor cmsh series central semiconductor nsq03a04 1n5817?n5822 595d series sprague motorola nihon diode tps series, taj series lr2010-01 series wsl series dale irc avx sense resistor si4435/6 fds series irf7309 internal rectifier fairchild vishay-siliconix mosfet part up2 series d03316p series cdrh127 series manufacturer sumida coilcraft coiltronics component inductor table 9. component suppliers
max1645/max1645a advanced chemistry-independent, level 2 battery chargers with input current limiting 30 ______________________________________________________________________________________ table 10. component selection 0.1?, >30v ceramic capacitor c23 40v, 2a schottky diodes central semiconductor cmsh2-40 d1, d2 small-signal diodes central semiconductor cmpsh-3 d3, d4 22?, 3.6a buck inductor sumida cdrh127-220 l1 30v, 11.5a, high-side n-channel mosfet (so-8) fairchild fds6680 n1 high-side mosfet 0.1? ceramic capacitors c8, c14, c16 0.01? ceramic capacitors c9, c10, c11 compensation capacitors 1500pf ceramic capacitor c13 0.1?, >20v ceramic capacitors c18, c24 1? ceramic capacitors c6, c7, c12 1?, >30v ceramic capacitors c5, c19, c20 22?, 25v low-esr tantalum capacitors avx tpsd226m025r0200 c3, c4 output capacitors 22?, 35v low-esr tantalum capacitors avx tpse226m035r0300 c1, c2 input capacitors description designation 40m ? ?%, 0.5w battery current-sense resistor dale wsl-2010/40m ? /1% r1 30v, 11a p-channel mosfet load and source switches fairchild fds6675 p1, p2 30v, 8.4a, low-side n-channel mosfet fairchild fds6612a or 30v, signal level n-channel mosfet 2n7002 n2 low-side mosfet 50m ? ?%, 0.5w source current-sense resistor dale wsl-2010/50m ? /1% r2 r3 + r4 >100k ? input current-limit setting resistors r3, r4 33 ? ?% resistor r12 1k ? ?% resistor r13 4.7 ? ?% resistors r14, r15 1 ? ?% resistors r11, r16 10k ? ?% resistors r5, r7, r8, r9, r10 10k ? ?% temperature sensor network resistor r6
max1645/max1645a advanced chemistry-independent, level 2 battery chargers with input current limiting ______________________________________________________________________________________ 31 rent capabilities and degrade efficiency. typically, a 22? inductor is ideal for all operating conditions. other components ccv, cci, and ccs are the compensation points for the three regulation loops. bypass ccv with a 10k ? resistor in series with a 0.01? capacitor to gnd. bypass cci and ccs with 0.01? capacitors to gnd. r7 and r13 serve as protection resistors to thm and cvs, respec- tively. to achieve acceptable accuracy, r6 should be 10k ? and 1% to match the internal battery thermistor. current-sense input filtering in normal circuit operation with typical components, the current-sense signals can have high-frequency tran- sients that exceed 0.5v due to large current changes and parasitic component inductance. to achieve prop- er battery and input current compliance, the current- sense input signals should be filtered to remove large common-mode transients. the input current limit sens- ing circuitry is the most sensitive case due to large cur- rent steps in the input filter capacitors (c1 and c2) in figure 1. use 1? ceramic capacitors from cssp and cssn to gnd. smaller 0.1? ceramic capacitors can be used on the csip and csin inputs to gnd since the current into the battery is continuous. place these capacitors next to the single-point ground directly under the max1645/max1645a. layout and bypassing bypass dcin with a 1? to gnd (figure 1). d4 protects the device when the dc power source input is reversed. a signal diode for d4 is adequate as dcin only powers the ldo and the internal reference. bypass ldo, bst, dlov, and other pins as shown in figure 1. good pc board layout is required to achieve specified noise, efficiency, and stable performance. the pc board layout artist must be given explicit instructions, preferably a pencil sketch showing the placement of power-switching components and high-current routing. refer to the pc board layout in the max1645/ max1645a evaluation kit manual for examples. a ground plane is essential for optimum performance. in most applications, the circuit will be located on a multi- layer board, and full use of the four or more copper lay- ers is recommended. use the top layer for high-current connections, the bottom layer for quiet connections (ref, ccv, cci, ccs, dac, dcin, v dd , and gnd), and the inner layers for an uninterrupted ground plane. use the following step-by-step guide: 1) place the high-power connections first, with their grounds adjacent: minimize current-sense resistor trace lengths and ensure accurate current sensing with kelvin con- nections. minimize ground trace lengths in the high-current paths. minimize other trace lengths in the high-current paths: use > 5mm-wide traces connect c1 and c2 to high-side mosfet (10mm max length) connect rectifier diode cathode to low-side. mosfet (5mm max length) lx node (mosfets, rectifier cathode, inductor: 15mm max length). ideally, surface-mount power components are flush against one another with their ground terminals almost touching. these high-current grounds are then connected to each other with a wide, filled zone of top- layer copper so they do not go through vias. the resulting top-layer subground plane is con- nected to the normal inner-layer ground plane at the output ground terminals, which ensures that the ic? analog ground is sensing at the supply? output terminals without interference from ir drops and ground noise. other high- current paths should also be minimized, but focusing primarily on short ground and current- sense connections eliminates about 90% of all pc board layout problems. 2) place the ic and signal components. keep the main switching nodes (lx nodes) away from sensitive ana- log components (current-sense traces and ref capacitor). important: the ic must be no further than 10mm from the current-sense resistors. keep the gate drive traces (dhi, dlo, and bst) shorter than 20mm and route them away from the current-sense lines and ref. place ceramic bypass capacitors close to the ic. the bulk capacitors can be placed further away. place the current-sense input filter capacitors under the part, connected directly to the gnd pin. 3) use a single-point star ground placed directly below the part. connect the input ground trace, power ground (subground plane), and normal ground to this node. chip information transistor count: 6996
max1645/max1645a advanced chemistry-independent, level 2 battery chargers with input current limiting maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. 32 ____________________maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 2001 maxim integrated products printed usa is a registered trademark of maxim integrated products. load adapter in max1645a cvs dcin ref cls agnd dac ccv cci ccs dds cssp cssn ldo dhi lx dlov bst pgnd dlo csip csin pdl batt thm v dd scl sda int battery host typical operating circuit

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